CS302 Assignment No 2 Spring 2017
Here we have complete Assignment and Solution of CS302 Digital Logic Design Assignment No 2 Spring 2017. Previously we shared CS302 Assignment No 1 Spring 2017. Lectures covered in Assignment :Lecture 10 to Lecture 16. CS302 Assignment Deadline is 22 May, 2017. Total Marks = 20.![]() |
CS302 Assignment No 2 Solution Spring 2017 |
CS302 Assignment Objectives:
- To get hands on experience of analyzing some situation to simplify its logic by any Logic Simplification Technique and drawing Circuit Diagram out of it.
CS302 Assignment Instructions:
It should be clear that your assignment will not get any credit if:- The assignment is submitted after due date.
- The assignment is submitted via email.
- The assignment is copied from Internet or from any other student.
- The submitted assignment does not open or file is corrupt.
- It is in some other format than .doc/docx.
For any query about the assignment, contact at CS302@vu.edu.pk
CS302 Assignment Question
(20 marks)Suppose a university’s research committee comprises of five members e.g. A, B, C, D, and E. When a research proposal is received by the committee, then it is reviewed by all the members for approval. Each member gives his consent regardless of the other to approve or disapprove a proposal. If three or more than three members give their consent in favor of that proposal, then that proposal will be approved otherwise it will be rejected.
As an engineer, you are asked to analyze the situation and draw logic circuit diagram to show whether a specific proposal will be approved or not.
You will first use truth table for your inputs and outputs (A binary 1 represents approval and binary 0 represents disapproval).
Simplify your expression obtained from truth table by using any expression simplification technique studied so far.
Draw logical circuit diagram for that simplified expression.
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